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FPGA/DSP和嵌入式處理系統(複雜電子)設計套件 Xilinx.ISE.Design.Suite v12.4 Windows 32/64bit 英文版 DVD

Xilinx ISE Design Suite 設計套件是面向Virtex -6 和Spartan -6 FPGA 系列並針對生產力精心優化的工具套件,在降低功耗與成本方面取得了突破性進展。作為業界唯一一款特定領域的設計套件,賽靈思最新版本的發布, 是這一行業屢獲殊榮的軟件不斷發展和演進的又一重要一步,它將進一步提高設計生產力和系統性能,使邏輯、嵌入式、數字信號處理(DSP) 和系統設計人員能夠更輕鬆地推出更複雜的創新型可編程電子產品,從而加速產品上市進程並提升產品質量。

特色設計工具
ISE Design Suite: Logic Edition
Front-to-back FPGA 邏輯設計
基於 RTL 的設計的完整流程
實現終極生產率
實現最佳系統性能

ISE Design Suite: Embedded Edition
集成嵌入式設計解決方案
硬和軟微處理器使用一條工具鏈
降低開發板複雜度和成本
利用智能工具和 IP 核

ISE Design Suite: DSP Edition
面向高性能 DSP 系統
利用適於各種方法的工具和 IP 核
解決 DSP 性能瓶頸
實現領先算法

ISE DESIGN SUITE 的主要優勢

針對 VIRTEX -6 和 SPARTAN -6 FPGA:
● 利用自動時鐘門控技術將動態功耗降低30%之多
● 利用第四代部分重配置設計流程降低系統成本
● PlanAhead - 面向邏輯設計人員的新款RTL 到比特流設計流程
● 利用AXI4 接口實現即插即用式FPGA 設計

Xilinx ISE Design Suite 12.4 憑藉半導體產業首個符合AXI4 標準的即插即用型IP 進一步擴展了Xilinx 平台設計方法。
ISE Design Suite 12.4主要功能:
● Spartan-6 FPGA 將靜態功耗削減30%,性能提升12%
● AMBA 4 AXI4 工具和IP 支持現已開始投產,可滿足即插即用型設計需求
● AMBA 4 AXI4 總線功能模塊助您輕鬆驗證設計

Xilinx introduced the ISE? Design Suite 12 software to enable
breakthrough optimizations for power and cost with greater design
productivity. For the first time, ISE design tools deliver 'intelligent'
clock-gating technology that reduces dynamic power consumption by as
much as 30 percent. The new suite also provides advances in
timing-driven design preservation, AMBA 4 AXI4-complaint IP support for
plug-and-play design, and an intuitive design flow with
fourth-generation partial reconfiguration capabilities that lowers
system cost for a broad range of high performance applications.

With full production support for all Xilinx? Virtex?-6 and Spartan?-6
FPGA families, the ISE 12 release continues its evolution as the
industry's only domain-specific design suite with interoperable design
flows and tool configurations for logic, digital signal processing
(DSP), embedded processing, and system-level design. In addition, Xilinx
incorporated a number of software infrastructure and methodology
enhancements that improve run time, streamline system integration, and
expand IP interoperability across its latest generation device families
and Targeted Design Platforms.

Intelligent Automation for Power Optimization

ISE Design Suite 12 introduces the FPGA industry's first intelligent
clock-gating technology with fully automated analysis and fine-grain
(logic slice) optimization capabilities specifically developed to reduce
the number of transitions, a primary contributing factor of dynamic
power dissipation in digital designs. The technology works by analyzing
designs using a series of unique algorithms to detect sequential
elements...


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